Semiconductor Industry News | Week 9 | 2026

Semiconductor Industry News Updates - week 9
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1) Compound Semiconductor Wafers 2026: Scaling Across SiC, GaN, GaAs and InP

AI power and optical demand drive wafer transitions

Compound semiconductor substrates and epiwafers continue expanding as AI infrastructure and EV electrification accelerate. The substrate market is projected to grow from about $1.3B in 2025 to nearly $2.8B by 2031, while open market epiwafer revenue follows a similar growth trajectory.

SiC remains the primary driver for high-voltage power electronics, GaAs holds steady in RF front-end applications, and InP gains momentum in high-speed optical interconnects for AI data centers.

Wafer scaling is central to cost reduction: SiC shifts from 6-inch to 8-inch, GaN on silicon pushes toward 12-inch formats, and InP progresses toward 6-inch production. The ecosystem is increasingly segmented by application, with vertical integration dominant in power devices and ongoing consolidation in LED and MicroLED markets.

 


 

2) Rapidus Secures 267.6 Billion Yen to Advance 2nm Toward 2027 Production

Public–private capital model backs advanced logic in Japan

Rapidus completed a 267.6 billion yen funding round combining government backing and private investment to support its 2nm mass production target for 2027.

Private capital includes participation from 32 companies spanning equipment, materials, telecom, electronics, and automotive sectors. Total capital base now exceeds 270 billion yen.

The roadmap aligns advanced logic manufacturing, chiplet packaging capability, and shortened turnaround manufacturing processes with national industrial strategy.

 


 

3) AWS and OpenAI Expand Enterprise Agent Delivery

Stateful AI runtime meets large-scale cloud infrastructure

AWS and OpenAI announced a multi-year partnership introducing a Stateful Runtime Environment on Amazon Bedrock for enterprise AI agents.

The platform enables persistent context, tool integration, and governance within regulated enterprise environments. AWS will serve as exclusive third-party cloud distribution provider for OpenAI Frontier.

OpenAI also committed approximately 2 GW of Trainium capacity, with Trainium4 expected in 2027 featuring higher memory bandwidth and compute efficiency.

 


 

4) OpenAI–Microsoft Partnership Terms Reaffirmed

Azure exclusivity and IP framework unchanged

OpenAI and Microsoft confirmed Azure remains the exclusive cloud provider for stateless OpenAI APIs, with intellectual property arrangements unchanged.

The framework preserves revenue-sharing terms and AGI governance definitions while allowing OpenAI to expand compute relationships elsewhere for infrastructure scale.

The announcement stabilizes commercial structure amid broader AI infrastructure expansion.

 


 

5) Meta Commits Up to 6 GW of AMD Instinct Capacity

AI infrastructure diversification accelerates

Meta signed a multi-year agreement with AMD to deploy up to 6 GW of Instinct GPU capacity for AI training and inference.

Initial deployments begin in late 2026 using Helios rack-scale systems. The collaboration aligns silicon, systems, and software roadmaps to optimize performance and supply predictability.

Meta positions the agreement alongside internal accelerator development as part of broader infrastructure diversification.

 


 

6) SambaNova Launches SN50 and Expands Intel Collaboration

Inference-focused accelerator with new capital backing

SambaNova introduced the SN50 inference chip built on its Reconfigurable Data Unit architecture, targeting low-latency, high-throughput AI inference.

The platform scales to 256 accelerators and integrates multi-tier memory optimized for large parameter models. The company raised over $350M in financing to expand manufacturing and cloud infrastructure.

SoftBank is announced as a deployment partner in Japan, while Intel collaboration strengthens cloud-scale integration.

 


 

7) SK hynix and Sandisk Launch High Bandwidth Flash (HBF) Standardization

New memory tier positioned between HBM and SSD

SK hynix and Sandisk initiated an Open Compute Project workstream to standardize High Bandwidth Flash.

HBF is designed as a new inference memory tier offering higher capacity than HBM and better efficiency than SSD storage. The approach targets scalable AI inference architectures with optimized total cost of ownership.

Commercial momentum is expected toward 2030 as inference-heavy deployments expand.

 


 

8) Micron Opens India Assembly and Test Facility

India enters advanced memory finishing supply chain

Micron inaugurated its assembly and test site in Sanand, Gujarat — India’s first facility of this scale for DRAM and NAND product finishing.

The site converts wafers into finished memory products, with tens of millions of chips expected in 2026 and expansion toward hundreds of millions in 2027.

The $2.75B investment includes sustainability targets and workforce development programs supporting India’s semiconductor ecosystem buildout.

 


 

9) Axelera AI Raises Over $250 Million to Scale Edge AI

European edge inference momentum strengthens

Axelera AI secured more than $250M in new funding, bringing total capital raised above $450M.

The company focuses on power-efficient edge inference platforms for constrained environments including industrial, defense, robotics, and retail deployments.

Manufacturing partnerships with TSMC and Samsung support scaling production capacity for global deployments.

 


 

10) SK hynix Accelerates Yongin Cluster Investment

21.6 trillion KRW facility expansion through 2030

SK hynix announced additional facility investment of 21.6 trillion KRW in its Yongin semiconductor cluster, accelerating cleanroom buildout timelines.

The first cleanroom opening moves forward to February 2027, aligning supply readiness with AI-driven memory demand growth.

The cluster includes more than 50 partner companies, reinforcing a vertically integrated memory ecosystem.

 


 

11) Imec Identifies DTCO Boosters for CFET Scaling

Monolithic CFET targeted for A7 to A3 nodes

Imec detailed performance enhancers for Complementary FET (CFET) scaling beyond nanosheet devices.

Monolithic CFET stacks nMOS and pMOS vertically to reduce cell height and improve logic density. Integration focuses on dielectric isolation modules, backside contacts, and compatibility with advanced threshold control.

The roadmap positions CFET as a continuation of logic scaling into the angstrom era.

 


 

12) Nvidia Reports $68.1B Quarter Driven by Data Center Growth

AI compute revenue sustains high margin profile

Nvidia reported $68.1B quarterly revenue, led by continued strength in data center GPU sales.

High gross margins reflect AI infrastructure demand and premium accelerator positioning, reinforcing Nvidia’s central role in hyperscale compute expansion.

Read the full news updates here:

This edition tracks the structural buildout of AI infrastructure across compute, memory, lithography, and quantum systems. Highlights include multi gigawatt accelerator agreements, inference focused silicon platforms, High NA EUV progress below 2 nm, CFET scalability studies, compound semiconductor wafer transitions, and new assembly and test capacity in India. Capital allocation remains concentrated around AI data center expansion, advanced logic nodes, heterogeneous memory hierarchies, and sovereign quantum capability. Together, these developments signal continued scaling across the semiconductor stack, from substrates and epitaxy to rack level systems and emerging quantum processors. Check out last edition!

- The Semiconductor Engineer

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